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    The P25D80SH is a serial interface Flash memory device designed for use in a wide variety of high-volume consumer based applications in which program code is shadowed from Flash memory into embedded or external RAM for execution. The flexible erase architecture of the device, with its page erase granularity it is ideal for data storage as well, eliminating the need for additional data storage devices.

    The erase block sizes of the device have been optimized to meet the needs of today‘s code and data storage applications. By optimizing the size of the erase blocks, the memory space can be used much more efficiently. Because certain code modules and data storage segments must reside by themselves in their own erase regions, the wasted and unused memory space that occurs with large sectored and large block erase Flash memory devices can be greatly reduced. This increased memory space efficiency allows additional code routines and data storage segments to be added while still maintaining the same overall device density. 

    The device also contains an additional 3*512-byte security registers with OTP lock (One-Time Programmable), can be used for purposes such as unique device serialization, system-level Electronic Serial Number (ESN) storage, locked key storage, etc. 

    Specifically designed for use in many different systems, the device supports read, program, and erase operations with a wide supply voltage range of 2.3V to 3.6V. No separate voltage is required for programming and erasing.

    P25D80SH是一種串行接口閃存設(shè)備，設(shè)計(jì)用于各種基于消費(fèi)者的應(yīng)用程序，程序代碼從閃存隱藏到嵌入式或外部RAM執(zhí)行。該設(shè)備靈活的擦除架構(gòu)，其頁(yè)面擦除粒度也是數(shù)據(jù)存儲(chǔ)的理想選擇，消除了對(duì)額外數(shù)據(jù)存儲(chǔ)設(shè)備的需要。

    該設(shè)備的擦除塊大小已經(jīng)被優(yōu)化，以滿足當(dāng)今的代碼和數(shù)據(jù)存儲(chǔ)應(yīng)用程序的需求。通過(guò)優(yōu)化擦除塊的大小，可以更有效地利用內(nèi)存空間。由于某些代碼模塊和數(shù)據(jù)存儲(chǔ)段必須自己駐留在它們自己的擦除區(qū)域中，因此，使用大分段和大塊擦除閃存設(shè)備所產(chǎn)生的浪費(fèi)和未使用的內(nèi)存空間可以大大減少。這種提高的內(nèi)存空間效率允許添加額外的代碼例程和數(shù)據(jù)存儲(chǔ)段，同時(shí)仍然保持相同的總體設(shè)備密度。

    該設(shè)備還包含一個(gè)額外的3*512字節(jié)的安全寄存器與OTP鎖（一次性可編程），可用于諸如唯一的設(shè)備序列化、系統(tǒng)級(jí)電子序列號(hào)（ESN）存儲(chǔ)、鎖定的密鑰存儲(chǔ)等目的。

    專為許多不同的系統(tǒng)而設(shè)計(jì)，該設(shè)備支持讀取、編程和擦除操作，電源電壓范圍為2.3V到3.6V。編程和擦除不需要單獨(dú)的電壓。

P25D80SH Overview：

  Single 2.3V to 3.60V supply

  Industrial Temperature Range -40C to 85C

  Serial Peripheral Interface (SPI) Compatible: Mode 0 and Mode 3

  Single, Dual SPI

    - Standard SPI: SCLK,CS#,SI,SO,WP#,HOLD#

    - Dual SPI: SCLK,CS#,IO0,IO1,WP#, HOLD#

  Flexible Architecture for Code and Data Storage

    - Uniform 256-byte Page Program

    - Uniform 256-byte Page Erase

    - Uniform 4K-byte Sector Erase

    - Uniform 32K/64K-byte Block Erase

    - Full Chip Erase

  Hardware Controlled Locking of Protected Sectors by WP Pin

  One Time Programmable (OTP) Security Register

    - 3*512-Byte Security Registers With OTP Lock

  128 bit unique ID for each device

  Fast Program and Erase Speed

    - 1.5ms Single/Dual page(s) program time

    - 16ms Page erase time

    - 16ms 4K-byte sector erase time

    - 16ms 32K/64K-byte block erase time

  JEDEC Standard Manufacturer and Device ID Read Methodology

  Ultra Low Power Consumption

    - 0.5uA Deep Power Down current

    - 10.0uA Standby current

    - 2.5mA Active Read current at 33MHz

    - 3.0mA Active Program or Erase current

    - 100,000 Program / Erase Cycles

    - 10-year Data Retention

    - 8-pin SOP (150mil/208mil)

    - 8-pin TSSOP

    - KGD for SiP

P25D80SH Pin Definition/引腳定義：

P25D80SH Block Diagram/結(jié)構(gòu)框圖：

P25D80SH Ordering Information：